TSMC, a leading semiconductor manufacturer, has announced a new chip manufacturing technology called A16, set to go into production in 2026. This technology is an enhancement of the company’s current 2nm process and promises a speed improvement of 8-10% over the existing N2P process. The A16 will incorporate nanosheet transistor designs, which TSMC is introducing in its 2nm technologies.
Furthermore, TSMC has clarified that the A16 process will not require ASML's latest high-NA EUV photolithography machines, which were initially considered necessary for such advanced manufacturing processes.
TSMC also showcased several other technological innovations, including the NanoFlex design optimization for its upcoming 2nm process. This allows for greater flexibility in chip design to improve power efficiency and performance.
Additionally, the company updated its 4nm technology (N4C), which is expected to reduce chip costs by 8.5% for value-tier products and is scheduled for mass production in 2025.
Regarding advanced packaging technologies, TSMC has already commenced production of its first System-on-Wafer (SoW) offering and plans further development of its Chip-on-Wafer-on-Substrate (CoWoS) technology, projected to be ready in 2027.
These announcements at TSMC’s recent symposium highlight the company’s ongoing innovations and its commitment to advancing the semiconductor industry.
